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Data Availavility Set: Energy/Power Bounds CMOS CS DACs

https://doi.org/10.5878/psy0-mm02
Data on energy consumption bounds in CMOS current-steering digital-to-analog converters. Data points presented in the results as well as the associated references. The dataset was originally published in DiVA and moved to SND in 2024.
Download data and documentation (15 files / 24.22 MiB)

Data files

  • [14] A 5.3GHz 16b 1.75GSps Wideband RF Mixing-DAC Achieving IMD less than -82dBc up to 1.9GHz.pdf
    727.29 KiB
  • [30] A compact dynamic-performance-improved current-steering DAC with random rotation-based binary-weighted selection.pdf
    2.34 MiB
  • [31] A 12b 1.6GSps 40mW DAC in 40nm CMOS with higher than 70dB SFDR over Entire Nyquist Bandwidth.pdf
    327.4 KiB
  • [32] A 12b 2GSps Dutal-Rate Hybrid DAC with Pulsed Timing-Error Pre-Distortion and In-Band Noise Cancellation.pdf
    4.2 MiB
  • [33] A 240 mW 16b 3.2 GSps DAC in 65 nm CMOS with less than -80 dBc IM3 up to 600 MHz.pdf
    810.91 KiB
  • [34] A 330 mW 14b 6.8 GSps Dual-Mode RF DAC in 16nm FinFET Achieving -70.8dBc ACPR in a 20MHz Channel at 5.2GHz.pdf
    1.21 MiB
  • [35] A 14 bit 200 MSps DAC with SFDR 78 dBc IM3 83 dBc and NSD 163 dBmHz across the whole Nyquist band.pdf
    1.9 MiB
  • [36] Demystifying and Mitigating Code-Dependent Switching Distortions in Current-Steering DACs.pdf
    4.08 MiB
  • [37] A 12-bit 320-MSampleps Current-Steering CMOS DA Converter in 0.44 mm2.pdf
    661.94 KiB
  • [38] A 12b 500MSps DAC with more than 70dB SFDR up to 120MHz in 0.18um CMOS.pdf
    801.56 KiB
  • [39] A 12 bit 1GSps dual-rate hybrid DAC with an 8 GSps unrolled pipeline delta-sigma modulator.pdf
    2.99 MiB
  • [40] A 16b 12GSps Single-Dual-Rate DAC with Successive Bandpass Delta-Sigma Modulator.pdf
    906.99 KiB
  • [41] A 16-bit 10Gsps current steering RF DAC in 65nm CMOS achieving 65dBc ACLR multi-carrier performance at 4.5GHz Fout.pdf
    301.92 KiB
  • [9] A 0.07mm2 162mW DAC Achieving 65 dBc SFDR and 70 dBc IM3 at 10 GSps With Output Impedance Compensation and Concentric Parallelogram Routing.pdf
    3.03 MiB
  • Data Points.xlsx
    26.2 KiB

Citation and access

Data access level:

Creator/​Principal investigator(s):

  • Oscar A. Morales Chacón - Linköpings university

Research principal:

Data contains personal data:

No

Citation:

Language:

Method and outcome

Data format/​data structure:

Administrative information

URN:

urn:nbn:se:liu:diva-178137Opens in a new tab

Topic and keywords

Standard för svensk indelning av forskningsämnen 2025:

Keywords:

Publications

Citation:

Morales Chacón, O., Wikner, J.J., Svensson, C. et al. Analysis of energy consumption bounds in CMOS current-steering digital-to-analog converters. Analog Integr Circ Sig Process 111, 339–351 (2022). https://doi.org/10.1007/s10470-022-02013-2Opens in a new tab

Metadata

Version 1
doris
Linköping University
Published:|Updated: